Fast TSN IP core for high performances deterministic applications
Time Sensitive Networking (TSN) is the name of the IEEE 802.1 Task Group responsible for standards at ISO Data layer. This group provides the specifications that will allow time-synchronized and low latency streaming services through IEEE 802 networks.
SCS has been developping a Fast Time Sensitive Networking IP core for high performances deterministic applications. SCS TSN IP Core is a flexible VHDL code ready to generate TSN endpoints or bridge implementations.
This IP core is ideal for the implementation of high performance TSN deterministic applications where network devices require minimum latency in the reception and transition of Ethernet frames.
The IP is provided with a rich set of Generic parameters to obtain the best functionalities resources trade-off. These generics can be configured at VHDL level by the initialization frames provided by a software tool.
SCS TSN IP-Core can be mapped to any programmable device from Intel, Lattice, MicroSemi, or Xilinx, or to any ASIC technology, provided sufficient silicon resources are available and able to run with the needed frequency (125MHz, 250 MHz). Please contact us to get accurate characterization data for your specific implementation requirements.
SCS TSN IP-Core is designed with industry best practices and is available in VHDL code. Deliverables provide everything required for a successful implementation, including sample scripts, testbench and comprehensive documentation.
Any IP core delivered by SCS is warranted against defects for ninety days from purchase. Thirty days of phone and email technical support are included, starting with the first interaction. Additional maintenance and support options are available.